index

MROD Details

General:

A List of current FPGA-code versions for the all the MROD-In and MROD-Out modules.
Where are the MROD-In Modules
Where are the MROd-Out Modules
Where are the ODIN-SLink Modules

HP1662A POD Connections for testing the MROD-In and MROD-Out.
Files (MROD_HP1662A_LogicAnalyzer.zip) with the settings for the HP1662A Logic Analyzer.

The Motorola Power PC module MVME2600 contains a CPU, which is connected via a PCI bus to the Tundra Universe bridge chip. VMEbus cycles are generated by choosing one of four programmable slave images in the Tundra Universe.
Read more about how addresses are manipulated through this chain.

An example how to program the Tundra Universe slave images in order to access the MROD-Out SHARC-A/B and CR/CSR space from VME.

How to perform a Hard Reset on the MROD-Out via VME.

Schematic of the cable between the Summit-ICE and NIKHEF "Standard" JTAG connector as used on the MROD-In and MROD-Out in. See also the description of the ByteBlasterMV.

The 'old' MROD-In (Version 1.0) Programmers Manual (September 21, 2001) can still be found here. The Upgrade document (November 13, 2002) highlights the differences between the 'old' version 1.0 and 'new' version 1.1 MROD-In from a Programmers point of view.
Also available: MROD-In (Version 1.1) Programmers Manual (June 25, 2003).

The 'old' MROD-Out Programmers Manual (July 9, 2003) can still be found here.

Power On Reset and Cofiguration of the FPGAs as implemented on the MROD modules