Generated by
EASE/HDL
for
peterj
on Mon Jul 02 11:00:54 2007
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MROD_X_In
Documentation for entity MROD_X_In/OutputPiece
Contents
Side Data
Generated HDL
Architectures
Architecture:
a0
Component: u1:
OutpStatem
: a0
Component: u2:
TrailerComparator
: a0
Component: u7:
OutpFifoCruncher
: a0
Component: u8:
Reg1Pst
: a0
Component: u13:
WritePulse
: a0
Component: u14:
RdoutEnReg
: a0
Component: u9:
MaxReadOut
: a0
Component: u5:
FpgaRdPipe
: a0
Component: u15:
AdrGen18Min5
: a0
Component: u3:
ZeroSuppressPipe
: a0