The transputers on the 2TP-VME access the Triple Port Memory (TPM) in a dedicated memory segment (see the memory map in Appendix A).
The TPM as a VME-slave has a base address that can be selected by on-board switches (see [1]). In case of a 128 kByte TPM address bits A17 to A31 are adjustable, giving a selectable base address range from $0000 xxxx to $FFFE xxxx, in case of a 512 kByte TPM address bits A19 to A31 are adjustable, giving a selectable base address range from $0000 xxxx to $FFF8 xxxx.
When a transputer sets its lock flag (see section 4 on the Statusregisters) an access to the Triple Port Memory will lock the TPM for exclusive access by this transputer. It can then e.g. simulate Read-Modify-Write cycles on TPM Because access to the TPM is denied to other masters during and after these cycles it is important that the lock flag is reset as soon as possible.
The TPM responds to A24 and A32 addresses. Depending on the AM-code, 24 or 32 address lines are decoded. The response to Supervisory / Non-Privileged and Program / Data access AM-codes can be set by on-board jumpers (see [1]).