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MROD-X Solder Side Thermal Picture

The GOL input links were interconnected by loopback fibers from MRODIN to MRODIN, so that sender and receiver were in different clock domains. Test software that generates CSM-like input data on the GOL outputs was running on the MRODIN DSPs and software that spyed on the event data and performed a full check on the data in real-time, was running on the MRODOUT DSP. The full hardware chain from MROD-X GOL; input up to, but not including, the SLINK output was thus continuously active (in this case: 6 GOL inputs and onboard RocketIO links) generating and processing event data.

FPGA silicon temperatures were read out by the test software:

FPGA:
 Degrees Centigrade
Channel 1-A
 42
Channel 1-B
 45
Channel 2-A
 43
Channel 2-B
 45
Channel 3-A
 40
Channel 3-B
 41
MROD-Out
 56
MROD-X Solder Side Thermal Picture


Normal picture of the MROD-X Solder Side
Last Updated: 03-01-2007
Peter Jansweijer