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MROD_X_Out

Documentation for entity MROD_X_Out/DecodeDelay

Architectures

• Architecture: a0
  • Component: u0: Inv1 : a0
  • Component: u1: Reg1 : a0
  • Component: u2: Reg1 : a0
  • Component: u6: Inv1 : a0
  • Component: u7: Inv1 : a0
  • Component: u8: OrG2 : a0
  • Component: u9: Reg1 : a0
  • Component: u10: Reg1 : a0
  • Component: u11: Reg1 : a0
  • Component: u12: Reg1 : a0
  • Component: u14: AndG2 : a0
  • Component: u15: AndInv : a0
  • Component: u21: AndG2 : a0
  • Component: u17: AndG2 : a0
  • Component: u4: AndG3 : a0
  • Component: u5: AndInv : a0
  • Component: u29: Reg1 : a0
  • Component: u33: SR_FF : a0
  • Component: u19: AndInv : a0
  • Component: u3: OrG2 : a0
  • Component: u16: AndG4 : a0
  • Component: u13: Reg1 : a0
  • Component: u18: Reg1 : a0
  • Component: u32: Inv1 : a0
  • Component: u20: DTACK_BERR_Generator : a0
  • Component: u22: AD_Phase_Generator : a0
  • Component: u23: Reg1 : a0
  • Component: u24: Reg1 : a0