Generated by EASE/HDL for peterj on Mon Jul 02 10:55:26 2007 |
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Contents | Side Data | Generated HDL |
1 -- EASE/HDL begin -------------------------------------------------------------- 2 -- Architecture 'a0' of 'DouchePutje. 3 -------------------------------------------------------------------------------- 4 -- Copy of the interface declaration of Entity 'DouchePutje' : 5 -- 6 -- port( 7 -- FlushSLink : in std_logic; 8 -- LDOWN_n : in std_logic; 9 -- LDOWNinternal_n : out std_logic; 10 -- LFF_n : in std_logic; 11 -- LFFinternal_n : out std_logic); 12 -- 13 -- EASE/HDL end ---------------------------------------------------------------- 14 15 architecture a0 of DouchePutje is 16 17 begin 18 LDOWNinternal_n <= LDOWN_n when FlushSLink = '0' else '1'; 19 LFFinternal_n <= LFF_n when FlushSLink = '0' else '1'; 20 21 end architecture a0 ; -- of DouchePutje 22 23