Back

Index

MROD_X_Out

OrG6

Documentation for architecture MROD_X_Out/OrG6/a0

VHDL Contents

    1  -- EASE/HDL begin --------------------------------------------------------------
    2  -- 
    3  -- Architecture 'a0' of entity 'OrG6'.
    4  -- 
    5  --------------------------------------------------------------------------------
    6  -- 
    7  -- Copy of the interface declaration:
    8  -- 
    9  --   port(
   10  --     A : in     std_logic;
   11  --     B : in     std_logic;
   12  --     C : in     std_logic;
   13  --     D : in     std_logic;
   14  --     E : in     std_logic;
   15  --     F : in     std_logic;
   16  --     O : out    std_logic);
   17  -- 
   18  -- EASE/HDL end ----------------------------------------------------------------
   19  
   20  architecture a0 of OrG6 is
   21  
   22  BEGIN
   23     O <= A Or B Or C Or D Or E Or F;
   24  end architecture a0 ; -- of OrG6
   25