Back

Index

MROD_X_Out

HitDecoder

Documentation for architecture MROD_X_Out/HitDecoder/a0

VHDL Contents

    1  -- EASE/HDL begin --------------------------------------------------------------
    2  -- 
    3  -- Architecture 'a0' of entity 'HitDecoder'.
    4  -- 
    5  --------------------------------------------------------------------------------
    6  -- 
    7  -- Copy of the interface declaration:
    8  -- 
    9  --   port(
   10  --     Cs_CR_CSR_n  : in     std_logic;
   11  --     Cs_IRQ_n     : in     std_logic;
   12  --     Cs_Sharc_n   : in     std_logic;
   13  --     Cs_USER_AM10 : in     std_logic;
   14  --     Er_CR_CSR_n  : in     std_logic;
   15  --     Er_Sharc_n   : in     std_logic;
   16  --     SlaveErr_n   : out    std_logic;
   17  --     SlaveHit_n   : out    std_logic);
   18  -- 
   19  -- EASE/HDL end ----------------------------------------------------------------
   20  
   21  architecture a0 of HitDecoder is
   22  
   23  begin
   24     Process(Cs_Sharc_n,
   25             Cs_IRQ_n,
   26             Cs_CR_CSR_n,
   27             Cs_USER_AM10,
   28             Er_Sharc_n,
   29             Er_CR_CSR_n)
   30     Begin
   31        --Combine all the Chip Select sources
   32        If Cs_Sharc_n = '0' Or 
   33           Cs_IRQ_n = '0' Or
   34           Cs_CR_CSR_n = '0' Or
   35           Cs_USER_AM10 = '1' Then
   36              SlaveHit_n <= '0';
   37        Else
   38              SlaveHit_n <= '1';
   39        End If;
   40  
   41        --Combine all the error sources
   42        If Er_CR_CSR_n = '0' Or 
   43           Er_Sharc_n = '0' Then
   44              SlaveErr_n <= '0';
   45        Else
   46              SlaveErr_n <= '1';
   47        End If;
   48  
   49     End Process;
   50  
   51  end architecture a0 ; -- of HitDecoder
   52