Generated by EASE/HDL for peterj on Mon Jul 02 10:55:25 2007

Documentation for architecture MROD_X_Out/BusRequester/a0

Contents Side Data Generated HDL

Fsm Conditions:

Label Name Usage VHDL
1
Rst_n='0'
1
LocBG_n = '1' AND 
   (AD_BRCST = '1' OR
   (DECODE = '1' AND SlaveHit_n = '0'))
1
NOT (AD_BRCST = '1' OR
    (DECODE = '1' AND SlaveHit_n = '0'))

Fsm Actions:

Label Name Usage VHDL
1
LocBR_n <= '1';
1
LocBR_n <= '0';
1
LocBR_n <= '1';