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MROD_X_Out

AckLogic

Documentation for architecture MROD_X_Out/AckLogic/a0

VHDL Contents

    1  -- EASE/HDL begin --------------------------------------------------------------
    2  -- Architecture 'a0' of 'AckLogic.
    3  --------------------------------------------------------------------------------
    4  -- Copy of the interface declaration of Entity 'AckLogic' :
    5  -- 
    6  --   port(
    7  --     Ack        : out    std_logic;
    8  --     LFF_n      : in     std_logic;
    9  --     MS3_n      : in     std_logic;
   10  --     S_LINKFull : in     std_logic);
   11  -- 
   12  -- EASE/HDL end ----------------------------------------------------------------
   13  
   14  architecture a0 of AckLogic is
   15  
   16  BEGIN
   17     Process (MS3_n, LFF_n, S_LINKFull)
   18     Begin
   19        If MS3_n = '0' And LFF_n = '1' And S_LINKFull = '0' Then
   20           Ack <= '1';
   21        Else
   22           Ack <= '0';
   23        End If;
   24     End Process;
   25  end architecture a0 ; -- of AckLogic
   26