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MROD_X_Out

SharcAdr_Dec

Documentation for architecture MROD_X_Out/SharcAdr_Dec/a0

VHDL Contents

    1  -- EASE/HDL begin --------------------------------------------------------------
    2  -- 
    3  -- Architecture 'a0' of entity 'SharcAdr_Dec'.
    4  -- 
    5  --------------------------------------------------------------------------------
    6  -- 
    7  -- Copy of the interface declaration:
    8  -- 
    9  --   port(
   10  --     A32     : in     std_logic;
   11  --     Adr     : in     std_logic_vector(31 downto 0);
   12  --     Adr_Dec : out    std_logic;
   13  --     BAR     : in     std_logic_vector(7 downto 0);
   14  --     BLT     : in     std_logic;
   15  --     DATA    : in     std_logic;
   16  --     NPRIV   : in     std_logic;
   17  --     PROG    : in     std_logic;
   18  --     SUPER   : in     std_logic);
   19  -- 
   20  -- EASE/HDL end ----------------------------------------------------------------
   21  
   22  architecture a0 of SharcAdr_Dec is
   23  
   24  BEGIN
   25     --The address range of the Sharc ranges from 0x00000000 to 0x001FFFFF.
   26     --This includes 2 memory pages (one for each SHARC):
   27     --Internal Memory Space        0x00000000 - 0x000FFFFF
   28     --These pages are mapped to VME addres space as:
   29     --Internal Memory Space SHARCa 0x00000000 - 0x000FFFFF
   30     --Internal Memory Space SHARCb 0x00100000 - 0x001FFFFF
   31     --address line A20 determines if SHARCa or SHARCb CS is asserted!
   32  
   33     --Address lines A[19..0] need to be passed to the SHARC, A20 determines which
   34     --SHARC is addressed.
   35     --Note that the above are 32 bit addresses. The VME bus is byte oriented so
   36     --address [20..0] corresponds to LocA[22..2] of the local address bus.
   37     --Note that SHARC address lines [22..20]  must be "000" during a asynchronous
   38     --access (see SHARC Technical Specification Page 7-9). They will be driven so when
   39     --the final address to the SHARC is composed in entity "InterfaceToSharc".
   40     --VME Address lines A[27..23] are compared against the BAR to gain a unique address
   41     --within the VME-crate. A[31..28] should be "0000".
   42  
   43     Process (A32, BAR, ADR, SUPER, NPRIV, PROG, DATA, BLT)
   44     Begin
   45        If (A32 = '1' And
   46           (((SUPER = '1' Or NPRIV = '1') And (PROG = '1' Or DATA = '1')) Or BLT = '1') And
   47           (BAR(7 Downto 3) = Adr(27 Downto 23)) And
   48           Adr(31 Downto 28) = "0000") Then
   49           Adr_Dec <= '1';
   50        Else
   51           Adr_Dec <= '0';
   52        End If;
   53     End Process;
   54  end architecture a0 ; -- of SharcAdr_Dec
   55