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MROD_X_Out

ABT543ToABT245

Documentation for architecture MROD_X_Out/ABT543ToABT245/a0

VHDL Contents

    1  -- EASE/HDL begin --------------------------------------------------------------
    2  -- Architecture 'a0' of 'ABT543ToABT245.
    3  --------------------------------------------------------------------------------
    4  -- Copy of the interface declaration of Entity 'ABT543ToABT245' :
    5  -- 
    6  --   port(
    7  --     DENIN0_n : in     std_logic;
    8  --     DENIN1_n : in     std_logic;
    9  --     DENO_n   : in     std_logic;
   10  --     EN0_n    : out    std_logic;
   11  --     EN1_n    : out    std_logic);
   12  -- 
   13  -- EASE/HDL end ----------------------------------------------------------------
   14  
   15  architecture a0 of ABT543ToABT245 is
   16  
   17  BEGIN
   18     --If '543' type databus buffers are used then the OE signals are
   19     --separate for the in- and output (DENIN0_n and DENIN1_n for the low
   20     --and high 16 bits of the databus input from VME; and DENO_n for 
   21     --32 bits data output to VME).
   22     --If '245'  type databus buffers are used then there is only one
   23     --OE signal for both input and output. These signals are made here:
   24  
   25     EN0_n <= DENIN0_n And DENO_n;
   26     EN1_n <= DENIN1_n And DENO_n;
   27  
   28  end architecture a0 ; -- of ABT543ToABT245
   29  
   30