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MROD_X_Out

To_Rst_n

Documentation for architecture MROD_X_Out/To_Rst_n/a0

VHDL Contents

    1  -- EASE/HDL begin --------------------------------------------------------------
    2  -- Architecture 'a0' of 'To_Rst_n.
    3  --------------------------------------------------------------------------------
    4  -- Copy of the interface declaration of Entity 'To_Rst_n' :
    5  -- 
    6  --   port(
    7  --     Rst_n      : out    std_logic;
    8  --     SYSRESET_n : in     std_logic);
    9  -- 
   10  -- EASE/HDL end ----------------------------------------------------------------
   11  
   12  architecture a0 of To_Rst_n is
   13  
   14  begin
   15     Rst_n <= SYSRESET_n;
   16  end architecture a0 ; -- of To_Rst_n
   17