Generated by EASE/HDL for peterj on Mon Jul 02 10:55:31 2007
Back Index MROD_X_Out VME_Sharc_Statem

Documentation for architecture MROD_X_Out/VME_Sharc_Statem/a0

Contents Side Data Generated HDL

Fsm Conditions:

Label Name Usage VHDL
1 
Rst_n='0'
1 
DSB = '0'
1 
DSB = '0'
1 
DECODE = '1' And
HBG_n = '0' And
Cs_Sharc_n = '0' And
R_W_n = '1'
1 
DECODE = '1' And
HBG_n = '0' And
Cs_Sharc_n = '0' And
R_W_n = '0'
1 
DECODE = '0' Or
HBG_n = '1' Or
Cs_Sharc_n = '1' Or
R_W_n = '0'
1 
DECODE = '0' Or
HBG_n = '1' Or
Cs_Sharc_n = '1' Or
R_W_n = '0'
1 
DECODE = '0' Or
HBG_n = '1' Or
Cs_Sharc_n = '1' Or
R_W_n = '0'
1 
DECODE = '0' Or
HBG_n = '1' Or
Cs_Sharc_n = '1' Or
R_W_n = '1'
1 
DECODE = '0' Or
HBG_n = '1' Or
Cs_Sharc_n = '1' Or
R_W_n = '1'
1 
DECODE = '0' Or
HBG_n = '1' Or
Cs_Sharc_n = '1' Or
R_W_n = '1'
1 
DECODE = '0' Or
HBG_n = '1' Or
Cs_Sharc_n = '1' Or
R_W_n = '1'
1 
DECODE = '0' Or
HBG_n = '1' Or
Cs_Sharc_n = '1' Or
R_W_n = '1'
1 
Er_Sharc_n = '0'
1 
DSB = '0' And
R_W_n = '1'
1 
DSB = '1'
1 
DSB = '1'
1 
DECODE = '0' Or
HBG_n = '1' Or
Cs_Sharc_n = '1' Or
R_W_n = '0'
1 
Er_Sharc_n = '1'
1 
Er_Sharc_n = '0'
1 
Er_Sharc_n = '1'
1 
DECODE = '0' Or
HBG_n = '1' Or
Cs_Sharc_n = '1' Or
R_W_n = '1'
1 
DSB = '0' And
R_W_n = '0'
1 
S_Redy = '1'
1 
S_Redy = '1'
1 
DECODE = '0' Or
HBG_n = '1' Or
Cs_Sharc_n = '1' Or
R_W_n = '0'
1 
DECODE = '0' Or
HBG_n = '1' Or
Cs_Sharc_n = '1' Or
R_W_n = '0'
1 
DECODE = '0' Or
HBG_n = '1' Or
Cs_Sharc_n = '1' Or
R_W_n = '1'

Fsm Actions:

Label Name Usage VHDL
Idle2 
Rd_n <= '1';
Wr_n <= '1';
Sharc_Ready <= '0';
Cs_n <= '1';
1 
Cs_n <= '0';
1 
Wr_n <= '1';
1 
Rd_n <= '1';
1 
Sharc_Ready <= '0';
1 
Sharc_Ready <= '0';
1 
Rd_n <= '1';
1 
Wr_n <= '1';
1 
Cs_n <= '0';
1 
Sharc_Ready <= '0';
1 
Wr_n <= '1';
1 
Rd_n <= '0';
1 
CS_n <= '0';
1 
Sharc_Ready <= '0';
1 
Wr_n <= '1';
1 
Rd_n <= '0';
1 
CS_n <= '0';
1 
Sharc_Ready <= '0';
1 
Rd_n <= '0';
1 
CS_n <= '0';
1 
Wr_n <= '1';
1 
Sharc_Ready <= '1';
1 
Rd_n <= '0';
1 
Wr_n <= '1';
1 
Cs_n <= '0';
1 
Sharc_Ready <= '1';
1 
Rd_n <= '1';
1 
Wr_n <= '1';
1 
Cs_n <= '0';
1 
Sharc_Ready <= '0';
1 
Rd_n <= '1';
1 
Wr_n <= '1';
1 
Cs_n <= '0';
1 
Sharc_Ready <= '0';
1 
Rd_n <= '1';
1 
Wr_n <= '1';
1 
Cs_n <= '0';
1 
Sharc_Ready <= '0';
1 
Rd_n <= '1';
1 
Wr_n <= '0';
1 
Cs_n <= '0';
1 
Sharc_Ready <= '0';
1 
Rd_n <= '1';
1 
Wr_n <= '0';
1 
Cs_n <= '0';
1 
Sharc_Ready <= '0';
1 
Rd_n <= '1';
1 
Cs_n <= '0';
1 
Wr_n <= '0';
1 
Sharc_Ready <= '1';
1 
Rd_n <= '1';
1 
Cs_n <= '0';
1 
Wr_n <= '0';
1 
Sharc_Ready <= '1';
1 
Rd_n <= '1';
1 
Wr_n <= '1';
1 
Cs_n <= '0';