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MROD_X_Out

N_To_digital

Documentation for architecture MROD_X_Out/N_To_digital/a0

VHDL Contents

    1  -- EASE/HDL begin --------------------------------------------------------------
    2  -- 
    3  -- Architecture 'a0' of entity 'N_To_digital'.
    4  -- 
    5  --------------------------------------------------------------------------------
    6  -- 
    7  -- Copy of the interface declaration:
    8  -- 
    9  --   generic(
   10  --     n :  positive := 8);
   11  --   port(
   12  --     i : in     std_logic_vector(n-1 downto 0);
   13  --     o : out    std_logic_vector(n-1 downto 0));
   14  -- 
   15  -- EASE/HDL end ----------------------------------------------------------------
   16  
   17  architecture a0 of N_To_digital is
   18  
   19  begin
   20     Process (i)
   21     Begin
   22        For K in n-1 Downto 0 Loop
   23           o(k) <= To_X01(i(k));
   24        End Loop;
   25     End Process;
   26  end architecture a0 ; -- of N_To_digital
   27