Generated by EASE/HDL for peterj on Mon Jul 02 10:55:26 2007
Back Index MROD_X_Out DMA_Statem

Documentation for architecture MROD_X_Out/DMA_Statem/a0

Contents Side Data Generated HDL

Fsm Conditions:

Label Name Usage VHDL
1 
Rst_n='0'
1 
EmptyFifo = '0'
1 
SharcRd = '1'
1 
SharcRd = '1' And EmptyFifo = '1'
1 
SharcRd = '1' And EmptyFifo = '0'

Fsm Actions:

Label Name Usage VHDL
1 
Low_High_n <= '1';
1 
RdReq <= '0';
1 
Low_High_n <= '1';
1 
RdReq <= '0';
1 
Low_High_n <= '1';
1 
RdReq <= '1';
1 
Low_High_n <= '1';
1 
RdReq <= '0';
1 
Low_High_n <= '0';
1 
RdReq <= '0';
1 
Low_High_n <= '0';
1 
RdReq <= '0';
1 
Empty <= '1';
1 
Empty <= '0';
1 
Empty <= '0';
1 
Empty <= '0';
1 
Empty <= '0';
1 
Empty <= '1';