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MROD_X_Out

IACK_Cycle_Detect

Documentation for architecture MROD_X_Out/IACK_Cycle_Detect/a0

VHDL Contents

    1  -- EASE/HDL begin --------------------------------------------------------------
    2  -- 
    3  -- Architecture 'a0' of entity 'IACK_Cycle_Detect'.
    4  -- 
    5  --------------------------------------------------------------------------------
    6  -- 
    7  -- Copy of the interface declaration:
    8  -- 
    9  --   generic(
   10  --     IRQ_Level :  positive := 7);
   11  --   port(
   12  --     Clk       : in     std_logic;
   13  --     Cs_IRQ_n  : out    std_logic;
   14  --     DSB       : in     std_logic;
   15  --     IACKIN_n  : in     std_logic;
   16  --     IACKOUT_n : out    std_logic;
   17  --     IACK_n    : in     std_logic;
   18  --     LADI      : in     std_logic;
   19  --     LvlMatch  : in     std_logic;
   20  --     Rst_n     : in     std_logic);
   21  -- 
   22  -- EASE/HDL end ----------------------------------------------------------------
   23  
   24  architecture a0 of IACK_Cycle_Detect is
   25  
   26  begin
   27     Process (Clk, Rst_n)
   28        Variable Pending: Boolean;
   29     Begin
   30        If Rst_n = '0' Then
   31           IACKOUT_n <= '1';
   32           Cs_IRQ_n <= '1';
   33           Pending := False;
   34        ElsIf Rising_Edge(Clk) Then
   35  
   36           --As long as there is no Interrupt Acknowledge Cycle
   37           --pending on this module
   38           If NOT Pending Then
   39              --Respond to faling edge of the IACKIN_n
   40              If IACKIN_n = '0' Then
   41                 --Is this an IACK cycle? (IACK_n = '0')
   42                 --and AS_n is sampled low (LADI = '1')
   43                 --and there was some time to decode this cycle (DSB = '1')
   44                 If IACK_n = '0' And LADI = '1' And DSB = '1' Then
   45                    --and this IACK_n is for our module in the IACK daisy chain in other words
   46                    --do we have a VME_IRQ_n Pending with the proper IRQ_Level?
   47                    If LvlMatch = '1' Then
   48                       --Assert Local IRQ Acknowledge which should take away the VME_IRQ_n
   49                       --by Cs_IRQ_n
   50                       IACKOUT_n <= '1';
   51                       Cs_IRQ_n <= '0';
   52                    Else
   53                       --Propagate the IACK Daisy Chain.
   54                       Cs_IRQ_n <= '1';
   55                       IACKOUT_n <= '0';
   56                    End If;
   57                    Pending := True;
   58                 End If;
   59              End If;
   60           End If;
   61  
   62           --As soon as the IACK_n cycle ends the IACK Daisy Chain should be reset.
   63           --Note that this is true for any DTACK. Either this cycle is an IACK cycle and this
   64           --DTACK ends this IACK cycle (resetting the Daisy Chain)
   65           --or this cycle was another cycle which means the IACK Daisy Chain is not in use.
   66           If DSB = '0' Then
   67              IACKOUT_n <= '1';
   68              Cs_IRQ_n <= '1';
   69              Pending := False;
   70           End If;
   71  
   72        End If;
   73     End Process;
   74  end architecture a0 ; -- of IACK_Cycle_Detect
   75