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MROD_X_Out

Mux_EVID_BCID

Documentation for architecture MROD_X_Out/Mux_EVID_BCID/a0

VHDL Contents

    1  -- EASE/HDL begin --------------------------------------------------------------
    2  -- Architecture 'a0' of 'Mux_EVID_BCID.
    3  --------------------------------------------------------------------------------
    4  -- Copy of the interface declaration of Entity 'Mux_EVID_BCID' :
    5  -- 
    6  --   port(
    7  --     BCID       : in     std_logic_vector(11 downto 0);
    8  --     EVID       : in     std_logic_vector(23 downto 0);
    9  --     Q          : out    std_logic_vector(24 downto 0);
   10  --     SelEV_BC_n : in     std_logic);
   11  -- 
   12  -- EASE/HDL end ----------------------------------------------------------------
   13  
   14  architecture a0 of Mux_EVID_BCID is
   15  
   16  begin
   17     Process (EVID, BCID, SelEV_BC_n)
   18     Begin
   19        If SelEV_BC_n = '1' Then
   20           Q(24) <= '0';
   21           Q(23 Downto 0) <= EVID;
   22        Else
   23           Q(24) <= '1';
   24           Q(23 Downto 12) <= (Others => '0');
   25           Q(11 Downto 0) <= BCID;
   26        End If; 
   27     End Process;
   28  end architecture a0 ; -- of Mux_EVID_BCID
   29