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MROD_X_Out

Mux2_1

Documentation for architecture MROD_X_Out/Mux2_1/a0

VHDL Contents

    1  -- EASE/HDL begin --------------------------------------------------------------
    2  -- 
    3  -- Architecture 'a0' of entity 'Mux2_1'.
    4  -- 
    5  --------------------------------------------------------------------------------
    6  -- 
    7  -- Copy of the interface declaration:
    8  -- 
    9  --   port(
   10  --     A       : in     std_logic;
   11  --     B       : in     std_logic;
   12  --     O       : out    std_logic;
   13  --     SelB_An : in     std_logic);
   14  -- 
   15  -- EASE/HDL end ----------------------------------------------------------------
   16  
   17  architecture a0 of Mux2_1 is
   18  
   19  BEGIN
   20     Process (A, B, SelB_An)
   21     Begin
   22        If SelB_An = '1' Then
   23           O <= B;
   24        Else
   25           O <= A;
   26        End If;
   27     End Process;
   28  end architecture a0 ; -- of Mux2_1
   29