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MROD_X_In

CompAB

Documentation for architecture MROD_X_In/CompAB/a0

VHDL Contents

    1  -- EASE/HDL begin --------------------------------------------------------------
    2  -- 
    3  -- Architecture 'a0' of entity 'CompAB'.
    4  -- 
    5  --------------------------------------------------------------------------------
    6  -- 
    7  -- Copy of the interface declaration:
    8  -- 
    9  --   generic(
   10  --     n :  natural := 8);
   11  --   port(
   12  --     A     : in     std_logic_Vector(n-1 downto 0);
   13  --     B     : in     std_logic_Vector(n-1 downto 0);
   14  --     Clk   : in     std_logic;
   15  --     En    : in     std_logic;
   16  --     Equal : out    std_logic;
   17  --     Rst_n : in     std_logic);
   18  -- 
   19  -- EASE/HDL end ----------------------------------------------------------------
   20  
   21  architecture a0 of CompAB is
   22  
   23  begin
   24  
   25    pr1:
   26    process (Clk, Rst_n)
   27    begin
   28      if (Rst_n = '0') then
   29        Equal <= '0';
   30      elsif (rising_edge(Clk)) then
   31        if (En = '1' and A = B) then
   32          Equal <= '1';
   33        else
   34          Equal <= '0';
   35        end if;
   36      end if;
   37    end process;
   38  
   39  end architecture a0 ; -- of CompAB
   40  
   41