Generated by EASE/HDL for peterj on Mon Jul 02 11:00:49 2007
Back Index GOL teststuff

Documentation for architecture GOL/teststuff/a0

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VHDL Contents

    1  -- EASE/HDL begin --------------------------------------------------------------
    2  -- Architecture 'a0' of 'teststuff.
    3  --------------------------------------------------------------------------------
    4  -- Copy of the interface declaration of Entity 'teststuff' :
    5  -- 
    6  --   port(
    7  --     Data     : in     std_logic_Vector(31 downto 0);
    8  --     ECRes    : in     std_logic;
    9  --     GTMode   : in     std_logic_Vector(2 downto 0);
   10  --     Rst_n    : in     std_logic;
   11  --     SClk     : in     std_logic;
   12  --     Sel_n    : in     std_logic;
   13  --     Trigger  : in     std_logic;
   14  --     Wr_n     : in     std_logic;
   15  --     XData    : out    std_logic_Vector(31 downto 0);
   16  --     XECRes   : out    std_logic;
   17  --     XGTMode  : out    std_logic_Vector(2 downto 0);
   18  --     XSel_n   : out    std_logic;
   19  --     XTrigger : out    std_logic;
   20  --     XWr_n    : out    std_logic);
   21  -- 
   22  -- EASE/HDL end ----------------------------------------------------------------
   23  
   24  architecture a0 of teststuff is
   25  
   26    type std_logic_v32array is array (natural range <>) of std_logic_vector(31 downto 0);
   27    constant CsmEvent : std_logic_v32array(0 to 159) := (
   28      x"D0000000",
   29      x"00000000", x"00000000", x"04000000", x"04000000",
   30      x"04000000", x"04000000", x"04000000", x"04000000",
   31      x"A0000BC0", x"B4000BC0", x"B1000BC0", x"B2000BC0",
   32      x"B7000BC0", x"B4000BC0", x"B1000BC0", x"B2000BC0",
   33      x"B7000BC0", x"B4000BC0",
   34      x"D0000000",
   35      x"A0000BC0", x"A5000BC0", x"A6000BC0", x"A3000BC0",
   36      x"A0000BC0", x"A5000BC0", x"A6000BC0", x"A3000BC0",
   37      x"C4000002", x"C4000002", x"C1000002", x"C2000002",
   38      x"C7000002", x"C4000002", x"C1000002", x"C2000002",
   39      x"C7000002", x"C4000002",
   40      x"D0000000",
   41      x"C4000002", x"C1000002", x"C2000002", x"C7000002",
   42      x"C4000002", x"C1000002", x"C2000002", x"C7000002",
   43      x"04000000", x"04000000", x"04000000", x"04000000",
   44      x"04000000", x"04000000", x"04000000", x"04000000",
   45      x"04000000", x"04000000",
   46      x"D4E00000",
   47      x"A0001BC1", x"A5001BC1", x"A6001BC1", x"A3001BC1",
   48      x"A0001BC1", x"A5001BC1", x"A6001BC1", x"A3001BC1",
   49      x"A0001BC1", x"B4001BC1", x"B1001BC1", x"B2001BC1",
   50      x"B7001BC1", x"B4001BC1", x"B1001BC1", x"B2001BC1",
   51      x"B7001BC1", x"B4001BC1",
   52      x"D0000000",
   53      x"34000000", x"31000000", x"32000000", x"37000000",
   54      x"34000000", x"31000000", x"32000000", x"37000000",
   55      x"34000000", x"34000000", x"31000000", x"32000000",
   56      x"37000000", x"34000000", x"31000000", x"32000000",
   57      x"37000000", x"34000000",
   58      x"D0000000",
   59      x"C4001003", x"C1001003", x"C1001003", x"C2001003",
   60      x"C6001003", x"C0001003", x"C6001003", x"C5001003",
   61      x"C3001003", x"C4001003", x"04000000", x"04000000",
   62      x"04000000", x"04000000", x"04000000", x"04000000",
   63      x"04000000", x"04000000",
   64      x"D0000000",
   65      x"04000000", x"04000000", x"04000000", x"04000000",
   66      x"04000000", x"04000000", x"04000000", x"04000000",
   67      x"04000000", x"04000000", x"C7001003", x"C7001003",
   68      x"C4001003", x"C3001003", x"C0001003", x"C5001003",
   69      x"C6001003", x"C0001003",
   70      x"D0000000",
   71      x"04000000", x"04000000", x"04000000", x"04000000",
   72      x"04000000", x"04000000", x"04000000", x"04000000",
   73      x"04000000", x"04000000", x"04000000", x"04000000",
   74      x"04000000", x"04000000", x"04000000", x"04000000",
   75      x"04000000", x"04000000",
   76      x"D4E00000",
   77      x"00000000", x"00000000", x"00000000", x"00000000",
   78      x"00000000", x"00000000", x"00000000"
   79    );
   80  
   81    --++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
   82  
   83    signal nwords : integer range 0 to 4095;
   84    signal modcnt : integer range 0 to 7;
   85    signal Pcnt   : integer range 0 to 4095;
   86    signal Phase  : integer range 0 to 255;
   87  
   88  begin
   89  
   90    -- for data and write signals.
   91    pr1:
   92    process (SClk, Rst_n)
   93    begin
   94      if (Rst_n = '0') then
   95        nwords <= 0;
   96        modcnt <= 0;  -- module n counter;
   97        XData <= (others => '0');
   98        XWr_n <= '1';  XSel_n <= '1';
   99        XGTMode(2 downto 0) <= "000";
  100        XTrigger <= '0';
  101        XECRes   <= '0';
  102        --
  103        Pcnt <= 0;
  104        Phase <= 0;
  105      elsif (rising_edge(SClk)) then
  106        modcnt <= modcnt + 1;
  107        if (modcnt = 3) then
  108          modcnt <= 0;
  109        end if;
  110        case Phase is
  111        when 0 =>
  112          -- wait while initializing
  113          if (Pcnt < 500) then
  114            Pcnt <= Pcnt + 1;
  115          else
  116            nwords <= 155;
  117            Pcnt <= 0;
  118            Phase <= Phase + 1;
  119          end if;
  120          --
  121        when 1 =>
  122          -- wait while sharc" writes fifo
  123          if (Pcnt < nwords) then
  124            if (modcnt = 0) then
  125              XData <= CsmEvent(Pcnt);
  126              XWr_n <= '0';  XSel_n <= '0';
  127              Pcnt <= Pcnt + 1;
  128            else
  129              XWr_n <= '1';  XSel_n <= '1';
  130            end if;
  131          else
  132            XData <= (others => '0');
  133            XWr_n <= '1';  XSel_n <= '1';
  134            modcnt <= 0;
  135            Pcnt <= 0;
  136            Phase <= Phase + 1;
  137          end if;
  138          --
  139        when 2 =>
  140          -- wait while tester sends out events
  141          if (Pcnt < 500) then
  142            if (Pcnt > 2 and Pcnt < 19) then   -- 4 triggers
  143              if (modcnt = 0) then
  144                XTrigger <= '1';
  145              else
  146                XTrigger <= '0';
  147              end if;
  148            end if;
  149            XGTMode(2 downto 0) <= "001";
  150            Pcnt <= Pcnt + 1;
  151          else
  152            XGTMode(2 downto 0) <= "000";
  153            Pcnt <= 0;
  154            Phase <= Phase + 1;
  155          end if;
  156          --
  157        when 3 =>
  158          -- wait while pausing and write the rest of the events
  159          if (Pcnt < 1000) then
  160            if (Pcnt < 500) then
  161              XGTMode(2 downto 0) <= "000";
  162            else
  163              XGTMode(2 downto 0) <= "001";
  164            end if;
  165            Pcnt <= Pcnt + 1;
  166          else
  167            XGTMode(2 downto 0) <= "000";
  168            Pcnt <= 0;
  169            Phase <= Phase + 1;
  170          end if;
  171          --
  172        when 4 =>
  173          -- wait while doing nothing.
  174          if (Pcnt < 100) then
  175            Pcnt <= Pcnt + 1;
  176          else
  177            Pcnt <= 0;
  178            Phase <= Phase + 1;
  179          end if;
  180          --
  181        when others =>
  182          null;
  183        end case;
  184        --
  185      end if;
  186    end process;
  187  
  188  end architecture a0 ; -- of teststuff
  189  
  190