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MGTR

RTFlags

Documentation for architecture MGTR/RTFlags/a0

VHDL Contents

    1  -- EASE/HDL begin --------------------------------------------------------------
    2  -- 
    3  -- Architecture 'a0' of entity 'RTFlags'.
    4  -- 
    5  --------------------------------------------------------------------------------
    6  -- 
    7  -- Copy of the interface declaration:
    8  -- 
    9  --   generic(
   10  --     sf :  positive := 7);
   11  --   port(
   12  --     Full_R  : in     std_logic;
   13  --     Full_X  : in     std_logic;
   14  --     HFull_R : in     std_logic;
   15  --     HFull_X : in     std_logic;
   16  --     LWX     : in     std_logic_Vector(23 downto 0);
   17  --     RqX     : in     std_logic;
   18  --     Rst_n   : in     std_logic;
   19  --     WXD     : out    std_logic_Vector(31 downto 0);
   20  --     WXE     : out    std_logic;
   21  --     XClk    : in     std_logic);
   22  -- 
   23  -- EASE/HDL end ----------------------------------------------------------------
   24  
   25  architecture a0 of RTFlags is
   26  
   27    signal SyncXR1 : std_logic_vector(7 downto 0);
   28    signal SyncXR2 : std_logic_vector(23 downto 0);
   29  
   30  begin
   31  
   32    pr1:
   33    process (XClk, Rst_n)
   34    begin
   35      if (Rst_n = '0') then
   36        SyncXR1 <= (others => '0');
   37        SyncXR2 <= (others => '0');
   38      elsif (rising_edge(XClk)) then
   39        SyncXR1 <= "0000" & Full_X & HFull_X & Full_R & HFull_R;
   40        SyncXR2 <= LWX(23 downto 0);
   41      end if;
   42    end process;
   43  
   44    pr2:
   45    process (XClk, Rst_n)
   46      variable cnt : unsigned(5 downto 0);
   47    begin
   48      if (Rst_n = '0') then
   49        WXD <= (others => '0');
   50        WXE <= '1';
   51        cnt := (others => '0');
   52      elsif (rising_edge(XClk)) then
   53        WXD <= SyncXR1 & SyncXR2;
   54        if (cnt = sf) then        -- cycle every sf counts (sf * 25 ns)
   55          WXE <= '0';             -- set not empty: send flags
   56          cnt := (others => '0');
   57        elsif (RqX = '1') then
   58          WXE <= '1';             -- "read word", set "empty" to not send another
   59          cnt := cnt + 1;
   60        else
   61          cnt := cnt + 1;
   62        end if;
   63      end if;
   64    end process;
   65  
   66  end architecture a0 ; -- of RTFlags
   67  
   68