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ZBase

Inv

Documentation for architecture ZBase/Inv/a0

VHDL Contents

    1  -- EASE/HDL begin --------------------------------------------------------------
    2  -- 
    3  -- Architecture 'a0' of entity 'Inv'.
    4  -- 
    5  --------------------------------------------------------------------------------
    6  -- 
    7  -- Copy of the interface declaration:
    8  -- 
    9  --   port(
   10  --     I : in     std_logic;
   11  --     Q : out    std_logic);
   12  -- 
   13  -- EASE/HDL end ----------------------------------------------------------------
   14  
   15  architecture a0 of Inv is
   16  
   17  begin
   18  
   19    Q <= not I;
   20  
   21  end architecture a0 ; -- of Inv
   22  
   23