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ZBase

NORg

Documentation for architecture ZBase/NORg/a0

VHDL Contents

    1  -- EASE/HDL begin --------------------------------------------------------------
    2  -- 
    3  -- Architecture 'a0' of entity 'NORg'.
    4  -- 
    5  --------------------------------------------------------------------------------
    6  -- 
    7  -- Copy of the interface declaration:
    8  -- 
    9  --   port(
   10  --     P1 : in     std_logic;
   11  --     P2 : in     std_logic;
   12  --     Q  : out    std_logic);
   13  -- 
   14  -- EASE/HDL end ----------------------------------------------------------------
   15  
   16  architecture a0 of NORg is
   17  
   18  begin
   19  
   20    Q <= not (P1 or P2);
   21  
   22  end architecture a0 ; -- of NORg
   23  
   24