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MROD_X_In

Adr6Mux

Documentation for architecture MROD_X_In/Adr6Mux/a0

VHDL Contents

    1  -- EASE/HDL begin --------------------------------------------------------------
    2  -- 
    3  -- Architecture 'a0' of entity 'Adr6Mux'.
    4  -- 
    5  --------------------------------------------------------------------------------
    6  -- 
    7  -- Copy of the interface declaration:
    8  -- 
    9  --   port(
   10  --     Adr    : out    std_logic_Vector(17 downto 0);
   11  --     Adr0h  : in     std_logic_Vector(12 downto 0);
   12  --     Adr1h  : in     std_logic_Vector(12 downto 0);
   13  --     Adr2h  : in     std_logic_Vector(12 downto 0);
   14  --     Adr3h  : in     std_logic_Vector(12 downto 0);
   15  --     Adr4h  : in     std_logic_Vector(12 downto 0);
   16  --     Adr5h  : in     std_logic_Vector(12 downto 0);
   17  --     Index0 : in     std_logic;
   18  --     Index1 : in     std_logic;
   19  --     Index2 : in     std_logic;
   20  --     Index3 : in     std_logic;
   21  --     Index4 : in     std_logic;
   22  --     Index5 : in     std_logic;
   23  --     TDC_No : in     std_logic_Vector(4 downto 0));
   24  -- 
   25  -- EASE/HDL end ----------------------------------------------------------------
   26  
   27  architecture a0 of Adr6Mux is
   28  
   29  begin
   30     Process (TDC_No, Index0, Index1, Index2, Index3, Index4, Index5,
   31                      Adr0h, Adr1h, Adr2h, Adr3h, Adr4h, Adr5h)
   32     Begin
   33        Adr(17 downto 13) <= TDC_No;
   34        If Index0 = '1' Then
   35           Adr(12 downto 0) <= Adr0h;
   36        ElsIf Index1 = '1' Then
   37           Adr(12 downto 0) <= Adr1h; 
   38        ElsIf Index2 = '1' Then
   39           Adr(12 downto 0) <= Adr2h; 
   40        ElsIf Index3 = '1' Then
   41           Adr(12 downto 0) <= Adr3h;
   42        ElsIf Index4 = '1' Then
   43           Adr(12 downto 0) <= Adr4h;
   44        ElsIf Index5 = '1' Then
   45           Adr(12 downto 0) <= Adr5h; 
   46        Else
   47           Adr(12 downto 0) <= (Others => '0');   
   48        End If;
   49     End Process;
   50  end architecture a0 ; -- of Adr6Mux
   51