Generated by EASE/HDL for peterj on Mon Jul 02 11:00:54 2007 |
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Contents | Side Data | Generated HDL |
1 -- EASE/HDL begin -------------------------------------------------------------- 2 -- 3 -- Architecture 'a0' of entity 'OutpFifoDataMux'. 4 -- 5 -------------------------------------------------------------------------------- 6 -- 7 -- Copy of the interface declaration: 8 -- 9 -- port( 10 -- BOL_Pattern : in std_logic_Vector(31 downto 0); 11 -- ChaID : in std_logic_Vector(2 downto 0); 12 -- D_OutpFifo : out std_logic_Vector(31 downto 0); 13 -- D_ZBT : in std_logic_Vector(31 downto 0); 14 -- EVID : in std_logic_Vector(11 downto 0); 15 -- LWC_Pattern : in std_logic_Vector(31 downto 0); 16 -- LastTLP : out std_logic_Vector(31 downto 0); 17 -- Q_Tetris : in std_logic_Vector(17 downto 0); 18 -- RdOutEn : in std_logic_Vector(17 downto 0); 19 -- TLP_Pattern : in std_logic_Vector(7 downto 0); 20 -- TWC_Pattern : in std_logic_Vector(7 downto 0); 21 -- TrailerSuppress : in std_logic; 22 -- WrBOEF : in std_logic; 23 -- WrBOL : in std_logic; 24 -- WrLWC : in std_logic; 25 -- WrTLP : in std_logic; 26 -- WrTWC : in std_logic; 27 -- ZeroSuppress : in std_logic); 28 -- 29 -- EASE/HDL end ---------------------------------------------------------------- 30 31 architecture a0 of OutpFifoDataMux is 32 33 Constant BOEF_Pattern: Std_Logic_Vector := x"8F000000"; 34 35 begin 36 37 Process(D_ZBT, LWC_Pattern, BOL_Pattern, TLP_Pattern, TWC_Pattern, Q_Tetris, RdOutEn,WrBOEF, WrLWC, WrBOL, WrTLP, WrTWC, ZeroSuppress, TrailerSuppress, ChaID, EVID) 38 Begin 39 If WrBOEF = '1' Then 40 D_OutpFifo <= BOEF_Pattern; 41 LastTLP <= (others => '0'); 42 ElsIf WrLWC = '1' Then 43 D_OutpFifo <= LWC_Pattern; 44 LastTLP <= (others => '0'); 45 ElsIf WrBOL = '1' Then 46 D_OutpFifo <= BOL_Pattern; 47 -- BOL word Bit 16 is replaced with the ZeroSuppress Status 48 -- Bit 17 is replaced with the TrailerSuppress Status 49 -- BOL word Bit (3 downto 0) are replaced with the Channel ID (note: bit 3 = '0') 50 D_OutpFifo(17) <= TrailerSuppress; 51 D_OutpFifo(16) <= ZeroSuppress; 52 D_OutpFifo(3) <= '0'; 53 D_OutpFifo(2 downto 0) <= ChaID; 54 LastTLP <= (others => '0'); 55 ElsIf WrTLP = '1' Then 56 D_OutpFifo(31 Downto 24) <= TLP_Pattern; 57 D_OutpFifo(23 Downto 18) <= (others => '0'); 58 D_OutpFifo(17 Downto 0) <= Q_Tetris And RdOutEn; 59 LastTLP(31 Downto 20) <= EVID; 60 LastTLP(19 downto 18) <= (others => '0'); 61 LastTLP(17 Downto 0) <= Q_Tetris And RdOutEn; 62 ElsIf WrTWC = '1' Then 63 D_OutpFifo(31 Downto 24) <= TWC_Pattern; 64 D_OutpFifo(23 Downto 0) <= (others => '0'); 65 LastTLP <= (others => '0'); 66 Else 67 D_OutpFifo <= D_ZBT; 68 LastTLP <= (others => '0'); 69 End If; 70 End Process; 71 72 end architecture a0 ; -- of OutpFifoDataMux 73 74