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MROD_X_In

Tri33Time

Documentation for architecture MROD_X_In/Tri33Time/a0

VHDL Contents

    1  -- EASE/HDL begin --------------------------------------------------------------
    2  -- 
    3  -- Architecture 'a0' of entity 'Tri33Time'.
    4  -- 
    5  --------------------------------------------------------------------------------
    6  -- 
    7  -- Copy of the interface declaration:
    8  -- 
    9  --   port(
   10  --     En : in     std_logic;
   11  --     I  : in     std_logic_Vector(35 downto 0);
   12  --     O  : out    std_logic_Vector(35 downto 0));
   13  -- 
   14  -- EASE/HDL end ----------------------------------------------------------------
   15  
   16  architecture a0 of Tri33Time is
   17  
   18  BEGIN
   19     Process (I, En)
   20     Begin
   21        If En = '1' Then
   22           O <= (Others => 'X') after 1500 ps, I after 4200 ps;
   23        Else
   24           O <= (Others => 'Z') after 3500 ps;
   25        End If;
   26     End Process;
   27  end architecture a0 ; -- of Tri33Time
   28