Generated by EASE/HDL for peterj on Mon Jul 02 11:00:52 2007
Back Index MROD_X_In High1

Documentation for architecture MROD_X_In/High1/a0

Contents Side Data Generated HDL

VHDL Contents

    1  -- EASE/HDL begin --------------------------------------------------------------
    2  -- Architecture 'a0' of 'High1.
    3  --------------------------------------------------------------------------------
    4  -- Copy of the interface declaration of Entity 'High1' :
    5  -- 
    6  --   port(
    7  --     O : out    std_logic);
    8  -- 
    9  -- EASE/HDL end ----------------------------------------------------------------
   10  
   11  architecture a0 of High1 is
   12  
   13  BEGIN
   14     O <= '1';
   15  end architecture a0 ; -- of High1
   16