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MROD_X_In

AllowOther

Documentation for architecture MROD_X_In/AllowOther/a0

VHDL Contents

    1  -- EASE/HDL begin --------------------------------------------------------------
    2  -- 
    3  -- Architecture 'a0' of entity 'AllowOther'.
    4  -- 
    5  --------------------------------------------------------------------------------
    6  -- 
    7  -- Copy of the interface declaration:
    8  -- 
    9  --   port(
   10  --     FpgaRd_n : in     std_logic;
   11  --     MS2_n    : in     std_logic;
   12  --     O        : out    std_logic;
   13  --     Phase    : in     std_logic);
   14  -- 
   15  -- EASE/HDL end ----------------------------------------------------------------
   16  
   17  architecture a0 of AllowOther is
   18  
   19  BEGIN
   20     Process (Phase, FpgaRd_n, MS2_n)
   21     Begin
   22        If MS2_n = '0' Or FpgaRd_n = '0' Then
   23           O <= Phase;
   24        Else
   25           O <= '1';
   26        End If;
   27     End Process;
   28  end architecture a0 ; -- of AllowOther
   29