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MROD_X_In

AdrGenMux

Documentation for architecture MROD_X_In/AdrGenMux/a0

VHDL Contents

    1  -- EASE/HDL begin --------------------------------------------------------------
    2  -- 
    3  -- Architecture 'a0' of entity 'AdrGenMux'.
    4  -- 
    5  --------------------------------------------------------------------------------
    6  -- 
    7  -- Copy of the interface declaration:
    8  -- 
    9  --   port(
   10  --     Adr   : out    std_logic_Vector(17 downto 0);
   11  --     AdrA  : in     std_logic_Vector(17 downto 0);
   12  --     AdrB  : in     std_logic_Vector(17 downto 0);
   13  --     AdrC  : in     std_logic_Vector(17 downto 0);
   14  --     Clk   : in     std_logic;
   15  --     ECR   : in     std_logic;
   16  --     Index : in     std_logic_Vector(17 downto 0);
   17  --     Rst_n : in     std_logic);
   18  -- 
   19  -- EASE/HDL end ----------------------------------------------------------------
   20  
   21  architecture a0 of AdrGenMux is
   22     Signal SelA: Std_Logic;
   23     Signal SelB: Std_Logic;
   24     Signal SelC: Std_Logic;
   25  BEGIN
   26     Process(Index)
   27        Variable N: Std_Logic;
   28     Begin
   29        N := '0';
   30        For I in 0 to 5 Loop
   31           N := N Or Index(I);
   32        End Loop;
   33        SelA <= N;
   34  
   35        N := '0';
   36        For I in 6 to 11 Loop
   37           N := N Or Index(I);
   38        End Loop;
   39        SelB <= N;
   40  
   41        N := '0';
   42        For I in 12 to 17 Loop
   43           N := N Or Index(I);
   44        End Loop;
   45        SelC <= N;
   46     End Process;
   47  
   48     Process(Clk, Rst_n)
   49     Begin
   50        If Rst_n = '0' Then 
   51           Adr <= (Others => '0');
   52        ElsIf Rising_Edge(Clk) Then
   53           If ECR = '1' Then
   54              Adr <= (Others => '0');
   55           ElsIf SelA = '1' Then
   56              Adr <= AdrA;
   57           ElsIf SelB = '1' Then
   58              Adr <= AdrB;
   59           ElsIf SelC = '1' Then
   60              Adr <= AdrC;
   61           End If;
   62       End If;
   63     End Process;
   64  end architecture a0 ; -- of AdrGenMux
   65