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MROD_X_In

X_IBUFGDS

Documentation for architecture MROD_X_In/X_IBUFGDS/a0

VHDL Contents

    1  -- EASE/HDL begin --------------------------------------------------------------
    2  -- Architecture 'a0' of 'X_IBUFGDS.
    3  --------------------------------------------------------------------------------
    4  -- Copy of the interface declaration of Entity 'X_IBUFGDS' :
    5  -- 
    6  --   port(
    7  --     N : in     std_logic;
    8  --     O : out    std_logic;
    9  --     P : in     std_logic);
   10  -- 
   11  -- EASE/HDL end ----------------------------------------------------------------
   12  
   13  architecture a0 of X_IBUFGDS is
   14    component Wrapped_IBUFGDS
   15      port(
   16        O  : out std_ulogic;
   17        I  : in  std_ulogic;
   18        IB : in  std_ulogic
   19        );
   20    end component;
   21  begin
   22     u0: Wrapped_IBUFGDS
   23        Port Map (
   24           O => O,
   25           I => P,
   26           IB => N);
   27  end architecture a0 ; -- of X_IBUFGDS
   28  
   29