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MROD_X_In

effe

Documentation for architecture MROD_X_In/effe/a0

VHDL Contents

    1  -- EASE/HDL begin --------------------------------------------------------------
    2  -- Architecture 'a0' of 'effe.
    3  --------------------------------------------------------------------------------
    4  -- Copy of the interface declaration of Entity 'effe' :
    5  -- 
    6  --   generic(
    7  --     Precision :  positive := 3 );
    8  --   port(
    9  --     Clk      : in     std_logic;
   10  --     Full     : out    std_logic;
   11  --     HalfFull : out    std_logic;
   12  --     Rd       : in     std_logic_Vector(2 downto 0);
   13  --     Rst_n    : in     std_logic;
   14  --     Wr       : in     std_logic_Vector(2 downto 0));
   15  -- 
   16  -- EASE/HDL end ----------------------------------------------------------------
   17  
   18  architecture a0 of effe is
   19     Constant LowerRange: Natural := 2 - (Precision - 1);
   20  begin
   21     Process (Clk, Rst_n)
   22        Variable Diff: Unsigned(2 downto LowerRange);
   23     Begin
   24        If Rst_n = '0' Then
   25           Full <= '0';
   26           HalfFull <= '0';
   27        ElsIf Rising_Edge(Clk) Then
   28           Full <= '0';
   29           HalfFull <= '0';
   30           If Unsigned(Wr(2 downto LowerRange)) = Unsigned(Rd(2 downto LowerRange)) - To_Unsigned(2,Precision) Then
   31              Full <= '1';
   32           End If;
   33           Diff := Unsigned(Wr(2 downto LowerRange)) - Unsigned(Rd(2 downto LowerRange));
   34           HalfFull <= Diff(2);
   35        End If;
   36     End Process;
   37  end architecture a0 ; -- of effe
   38  
   39