Generated by EASE/HDL for peterj on Mon Jul 02 11:00:55 2007
Back Index MROD_X_In startuprst

Documentation for architecture MROD_X_In/startuprst/a0

Contents Side Data Generated HDL

VHDL Contents

    1  -- EASE/HDL begin --------------------------------------------------------------
    2  -- Architecture 'a0' of 'startuprst.
    3  --------------------------------------------------------------------------------
    4  -- Copy of the interface declaration of Entity 'startuprst' :
    5  -- 
    6  --   port(
    7  --     Rst_n : out    std_logic := '1');
    8  -- 
    9  -- EASE/HDL end ----------------------------------------------------------------
   10  
   11  architecture a0 of startuprst is
   12  
   13  begin
   14     Rst_n <= '0' after 1200 ns, '1' after 1300 ns  when now = 0 ns;
   15  end architecture a0 ; -- of startuprst
   16  
   17