Back

Index

MROD_X_In

RdPulseA20Dec

Documentation for architecture MROD_X_In/RdPulseA20Dec/a0

VHDL Contents

    1  -- EASE/HDL begin --------------------------------------------------------------
    2  -- 
    3  -- Architecture 'a0' of entity 'RdPulseA20Dec'.
    4  -- 
    5  --------------------------------------------------------------------------------
    6  -- 
    7  -- Copy of the interface declaration:
    8  -- 
    9  --   port(
   10  --     A21_Select : in     std_logic;
   11  --     Adr        : in     std_logic_Vector(21 downto 0);
   12  --     Rd_n       : in     std_logic;
   13  --     Read_n     : out    std_logic;
   14  --     Sel_n      : in     std_logic);
   15  -- 
   16  -- EASE/HDL end ----------------------------------------------------------------
   17  
   18  architecture a0 of RdPulseA20Dec is
   19  
   20  begin
   21     Process (Rd_n, Sel_n, Adr, A21_Select)
   22     Begin
   23        If (Rd_n = '0' And Sel_n = '0' And Adr(21) = A21_Select) Then
   24           Read_n <= '0';
   25        Else
   26           Read_n <= '1';
   27        End If;
   28     End Process;
   29  end architecture a0 ; -- of RdPulseA20Dec
   30  
   31