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MROD_X_In

WrSelect

Documentation for architecture MROD_X_In/WrSelect/a0

VHDL Contents

    1  -- EASE/HDL begin --------------------------------------------------------------
    2  -- 
    3  -- Architecture 'a0' of entity 'WrSelect'.
    4  -- 
    5  --------------------------------------------------------------------------------
    6  -- 
    7  -- Copy of the interface declaration:
    8  -- 
    9  --   port(
   10  --     A21_Select : in     std_logic;
   11  --     Adr        : in     std_logic_Vector(21 downto 0);
   12  --     SharcWr_n  : in     std_logic;
   13  --     Wr_n       : out    std_logic);
   14  -- 
   15  -- EASE/HDL end ----------------------------------------------------------------
   16  
   17  architecture a0 of WrSelect is
   18  
   19  begin
   20     Process (SharcWr_n, Adr, A21_Select)
   21     Begin
   22        If SharcWr_n = '0' and (Adr(21) = A21_Select) Then
   23           Wr_n <= '0';
   24        Else
   25           Wr_n <= '1';
   26        End If;
   27     End Process;
   28  
   29  end architecture a0 ; -- of WrSelect
   30  
   31