Generated by
EASE/HDL
for
peterj
on Mon Jul 02 10:55:24 2007
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MGTEVB
Documentation for entity MGTEVB/MakeEvents
Contents
Side Data
Generated HDL
Architectures
Architecture:
a0
Component: u1:
MakeHeader
: a0
Component: u2:
MuxData
: a0
Component: u10:
RegEvBuild
: a0
Component: u11:
RegEvTDC
: a0
Component: u12:
SLinkPipe
: a0
Component: u3:
MuxControl
: a0
Component: u13:
DataSpy
: a0