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MROD_X_Out

Shift_Out

Documentation for architecture MROD_X_Out/Shift_Out/a0

VHDL Contents

    1  -- EASE/HDL begin --------------------------------------------------------------
    2  -- 
    3  -- Architecture 'a0' of entity 'Shift_Out'.
    4  -- 
    5  --------------------------------------------------------------------------------
    6  -- 
    7  -- Copy of the interface declaration:
    8  -- 
    9  --   generic(
   10  --     Bits :  positive := 10);
   11  --   port(
   12  --     Clk    : in     std_logic;
   13  --     D      : in     std_logic_vector(Bits-1 downto 0);
   14  --     Load   : in     std_logic;
   15  --     Rst_n  : in     std_logic;
   16  --     SerOut : out    std_logic;
   17  --     Shift  : in     std_logic);
   18  -- 
   19  -- EASE/HDL end ----------------------------------------------------------------
   20  
   21  architecture a0 of Shift_Out is
   22  begin
   23     Process (Clk, Rst_n)
   24        Variable Q_Int: Std_Logic_Vector(Bits-1 downto 0);
   25     Begin
   26        If Rst_n = '0' Then
   27           SerOut <= '0';
   28           Q_Int := (Others => '0');
   29        ElsIf Rising_Edge(Clk) Then
   30           If Load = '1' Then
   31              Q_Int := D;
   32              SerOut <= '1';
   33           ElsIf Shift = '1' Then
   34              SerOut <= Q_Int(0);
   35              For I In 0 To Bits - 2 Loop
   36                 Q_Int(I) := Q_Int(I+1);
   37              End Loop;
   38           Else
   39              SerOut <= '0';
   40           End If;
   41        End If;
   42     End Process;
   43  end architecture a0 ; -- of Shift_Out
   44