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White Rabbit:


A flyer briefly explains "Large systems with high resolution timing".



A feasablility study (in the
KM3NeT framework)
has been done to verify that it is possible to measure propagation delay over a coded serial communication channel. The results were presented at the VLVnT09 held October 13-15, 2009 in Athens.
The same principle could be used in the White Rabbit project.


Time Offset Test Setup

Further research has been done to "measure propagation delay over a 1.25 Gbps bidirectional data link" (ETR 2010-01).
This report describes how time offset between a Master and a Slave node can be measured using the SerDes architecture of a Virtex-5 FPGAs.

Simple PCI-Express Card (SPEC). Can serve as a White Rabbit end-node.
5-channel Digital I/O module (FMC-DIO-5CH TTL) that can be plugged onto the SPEC card in the configuration that is used for the SPEC Demonstartion Package for White Rabbit (see manual).


February 18, 2010:
June 29, 2010:
November 9, 2011:
Birth of this web page...
Added a link to Technical Report ETR2010-01
Added links to SPECand FMC-DIO-5CH TTL

Last Updated: 09-11-2011
Peter Jansweijer