In this chapter will be described how the selection of banks to be generated on the READOUT transputers takes place.
Per (sub)component and per triggertype there is a list of banks (see file banksets.inc) to be produced; at every startup a hardware configuration file (hwconfig.dat, see chapter 4 ('Hardware Configuration File')) is read that contains amongst other things per crate a list of Digital Cards and the component each Digital Card belongs to; from this information and the banklists the READOUT transputer compiles a banklist per triggertype containing all banks to be produced from all components present in that crate for that particular triggertype.
There are some limitations to the Digital Card distribution related to the generation of banks:
At every startup a socalled 'bank-bitpattern' is sent along with the hardware configuration (can be set separately for FCAL, BCAL and RCAL; see chapter 5 ('Data-acquisition Configuration File')).
Using the 'bank-bitpattern' the generation of banks can be steered; all banks of a certain component may be 'switched off' (i.e. its banks are not produced) or certain bank 'types' or 'classes' (e.g. BeginOfRun banks) may be enabled/disabled; see chapter 6 ('Bank Bit Pattern').
For every bank in the compiled banklists the required bank-bitpattern is compared to the received value and generation of the bank is disabled if the required bank-bitpattern is not a subset of the received value (this applies only to the bits in the bank-bitpattern that steer the generation of bank classes).
The most important constants governing the generation of banks:
Adding a new bank(set) or component involves additions/changes to several files in the include, readout, libs and test subdirectories in /zeus/transputer/online/vxx.y/src/ (CALDAQ transputer code version xx.y).
Appendix B shows a complete list with short descriptions of all additions and modifications needed to incorporate a new Digital Card based subdetector in the CALDAQ readout system.
The most important include files are: