"fuji.nikhef.nl": -> mrodcmd
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TIM Register 1: Command Register
	0x480001 = 0x1000	Enable Run Mode
	bit 12 = '0':	Stad Alone Mode
	bit 12 = '1':	Run Mode (TTCrx)

TIM Register 12: TTC Enables Register
	0x48000c = 0x07FF
			Enable all TTC signals and Event, Bunch-ID and TriggerType

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"jura.nikhef.nl": -> ttcvi
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<reset _ttcvi>
Control:
	Trigger Select
		L1a:	Pulsdoos	=> L1a Number: number [0..3]  of external input on TTCvi 
		Random: TTCvi internally generated
	External Orbit
		No
	Fifo Reset
		Yes
	Trigger Rate
		1:	If random was selected for the trigger then 1 Hz random trigger
	Orbit Count
		No

Access:
	Triggerword (see also TTCvi-MkII Rev 1.6 page 14):
		MSW = 0x0
		LSW = 0x300

		Size = '1'	TTC long frames (Individually-addressed Commands/Data frame
				page 14 TTCrx Reference Manual Rev 3.8)
		I_n/E ='1'	External command,
				Do not access the internal registers of the TTCrx chip.
				Note that this means also that TTCrx DQ[3..0] = "0000"
				(see TTCrx Reference Manual Rev 3.8, Chapter 4).
		TTCrxADDR = 0	Global addressing with generic address 0
				(send this to all TTCrx chips)
		SubAddr = 0	Output pins SUBADDR[7..0] on TTCrx = "00000000" needed for
				the TIM	to decode a Trigger-type

		Data = TType	Output pins Dout[7..0] on TTCrx will be Trigger Type
				input on TTCvi

Access:
	ShortCycle (=Broadcast Frame, See TTCrx Reference Manual Rev 3.8 page 14 and page 24)
		x3:	ECR, BCR

Access:
	Event Count lsw 0x0
	Event Count msw 0x0

Access:
	LongCycle (=Individually Addressed Commmand/Data Frame, See TTCrx Reference Manual Rev 3.8
				 page 14, TTCvi-MkII Rev 1.6 page 8)
		0x800003B3
		  ^^^^^^||----> 0xB3 see TTCrx Table 5 (TTCrx Control register)
		      ||			Enable External bus for Dout and DoutStr!
		      ||------>	0x03 control register (TTCrx internal subaddress 0x3,
		  ||||		See TTCrx Reference Manual Rev 3.8 page 21)
		  ||||--------> 0x8000 Individual TTCrx Address = generic address 0x0. D15 = '1'
						D0 = E = '0' => Internal registers
		0x806603B3	May also be used when the ID bit jumpers on the TTCrm are configured
		  ||||		for TTCrx Address 0x0033 (ID[13..0] = 0x0033).
		  ||||--------> 0x8066 Individual TTCrx Address = generic address 0x0033. D15 = '1'
						D[14..1] = 0x0033, D0 = E = '0' => Internal registers

Access:
	LongCycle (=Individually Addressed Commmand/Data Frame, See TTCrx Reference Manual Rev 3.8
				 page 14, TTCvi-MkII Rev 1.6 page 8)
		0x80000005
		  ^^^^^^||----> 0x05 means Clock and Clk40Des1 are in phase.
		      ||------>	0x00 control register (TTCrx Fine Delay Register 1
		  ||||		See TTCrx Reference Manual Rev 3.8 page 21)
		  ||||--------> 0x8000 Individual TTCrx Address = generic address 0x0. D15 = '1'
						D0 = E = '0' => Internal registers