High Resolution Large Area X-ray Detector

The High dynamic range and ultra-low noise characterise CMOS based Single Photon Counters (SPCs). Consequently, such systems can image objects with a high contrast  and eliminate noise from the relevant signal. When they are highly segmented low-dose imaging with a high spatial resolution can be achieved. Medipix is such a photon counting pixel detector and has therefore become attractive for X-ray imaging applications.

Many objects, however, are larger than one single Medipix chip (1.4 x 1.4 cm²), research at Nikhef is aimed at enlargement of the active surface area (current CCD imagers are typically 24 x 30 cm²) by means of tiling. In order to obtain a large seamless tessellation, two aspects are being considered:

1. the amount of dead material (i.e. wire bonds and readout chip periphery) between the individual assemblies;
2. the inactive sensor area along the edges.

Both must be reduced to a minimum. Efforts are being made to development of the Through-Silicon-Via (TSV). In order to reduce the surface current at the sensor sides, a novel cutting technique called Deep Reactive Ion Etching (DRIE) is examined, which offers the advantage of low surface damage. The resulting smoother edge yields lower surface leakage and hence the conventional guard ring can be replaced by a much narrower n⁺ or p⁺ doped Stop Ring at the edge. In this way, the inactive area surrounding the pixel matrix may be reduced to less than 50μm, even at high potential drops. Currently, such edgeless structures made of silicon are under study. 

At Nikhef the focus is on the miniaturisation of electronics. This has caused the digital revolution. Present-day circuit-design and semiconductor processing technologies have enabled us to completely change the way in which X-rays are detected and processed in commercial X-ray diffraction (XRD) and X-ray fluorescence (XRF) equipment. Here we propose to add even more functionality to such equipment, by means of tiling together several single photon-counting pixel-readout circuit on one single semi conducting sensor chip. Many new applications can be targeted, in materials research as well as in life-sciences, e.g. proteomics and pharmacological research, if such a large-area detector system can be designed and built.

We want to reduce the insensitive area by avoiding the use of wire-bonds. For this, we will etch high-aspect ratio holes below the wire-bond pads to the bottom of the chip. The diameter and the depth of these holes will be about 50µm. The holes will be filled with an insulator (BCB, Polyimide) and then small holes will be etched in the insulator and filled with metal (Copper, Copper alloy). The open metal contacts will be connected to the ceramic circuit board by a ball-grid-array.

The sensor will be a planar, active-edge sensor, eliminating the need for guardring structures and allowing sensitivity up to 50µm from the edges. For this purpose, we will increase the sensor dimension to cover the full area of the readout chips.

The clock and data signals are 200 MHz and are multiplexed/demultiplexed into one high-bandwith, clock encoded in the data, signal of around 1 Gbit/s. In this architecture, chips are read out in parallel and the total readout time for an 4-chip assembly is about 5 ms.

Below you can see pictures of the prototype device. The readout speed achieved with standard ethernet cat5 cable is 3 Gbit/s to special Motherboard using our own communication protocol. Direct connection to laptop or table PC using standard 1-Gigabit Ethernet is also possible with this reduced speed.